发明名称 Dual bit line driver for memory
摘要 A non-volatile memory device has memory cells arranged in addressable columns. The memory cells in each column are coupled to a common bit line. Bit line driver circuitry coupled to the bit line includes multiple drivers. In one embodiment, two drivers are coupled to opposite ends of the bit line. The driver circuits can be activated together, or separately, in response to decoder circuitry. The memory device can be a flash memory device having floating gate memory cells.
申请公布号 US2003012053(A1) 申请公布日期 2003.01.16
申请号 US20010904233 申请日期 2001.07.12
申请人 MICRON TECHNOLOGY, INC. 发明人 CHEVALLIER CHRISTOPHE
分类号 G11C7/12;G11C16/08;G11C16/24;(IPC1-7):G11C11/34 主分类号 G11C7/12
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