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发明名称
半导体装置及其制造方法
摘要
本发明提供一种以简易制程可实现希望电容的DRAM的半导体装置及其制造方法。在记忆体区域设有记忆胞电晶体和沟渠型电容器,在逻辑电路区域设有CMOS的各电晶体。设有位元线接点31和延伸于层间绝缘膜30上的位元线31。在记忆胞电晶体,源极扩散层18为两个绝缘膜侧壁25a、25b所覆盖,矽化物层未形成于源极扩散层18上。此外,设有贯通层间绝缘膜30而连接屏蔽线33和板极16b的板极接点31,此屏蔽线33设于和位元线32相同配线层。
申请公布号
TW200305277
申请公布日期
2003.10.16
申请号
TW092103089
申请日期
2003.02.14
申请人
松下电器产业股份有限公司
发明人
小川久;宫永绩;江利口 浩二;山田隆顺;系长总一郎;森 义弘
分类号
H01L27/108
主分类号
H01L27/108
代理机构
代理人
陈长文
主权项
地址
日本
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