发明名称 PACKET COMMUNICATION CIRCUIT AND APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a packet communication circuit and apparatus with a high throughput without the need for provision of a means for searching a table by each path to which a packet is transmitted, avoiding the throughput of the apparatus from being decreased even when a packet to be sent to a plurality of paths is outputted to a common bus and not needing even a buffer memory of a large capacity. <P>SOLUTION: A data accommodation means 2 for accommodating data configuring a plurality of packets is configured such that a data output means 1 sequentially outputs the data configuring a plurality of packets to the paths to which the data are to be transmitted and a data write means 51 writes and stores the data to a data storage means 4. A packet transmission means 5 is configured such that the means 5 reads the data stored in the data storage means by each path to reconfigure the packets and transmits the packets to each path. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004104358(A) 申请公布日期 2004.04.02
申请号 JP20020262022 申请日期 2002.09.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKA NAOTO;IKEDA KIYOSHI
分类号 H04L12/70;H04L12/741;H04L12/771;H04L12/861;H04L12/931;H04L12/951;(IPC1-7):H04L12/56 主分类号 H04L12/70
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