| 摘要 |
<p>A system for linearizing non-linear transducer output signals includes an analog-to-digital converter having a plurality of digital outputs. A first group of the most significant bits of the analog-to-digital converter digital outputs are coupled to address inputs of a read only memory. The remaining digital outputs of the analog-to-digital converter are coupled to a first group of inputs of a digital multiplying circuit. A first group of data outputs of the read only memory are coupled to a first group of inputs of a summing circuit and represent intersection points of a piece-wise linear approximation to a mathematical curve representing the relationship between unlinearized data produced by the analog-to-digital converter and linearized data produced by the linearizing system. A second group of the read only memory data outputs are coupled to a second group of inputs of the digital multiplying circuit and represent the slopes of straight lines extending from one intersection point toward another. The digital multiplying circuit produces a product word, a predetermined number of bits of which are algebraically summed with the first group of read only memory data outputs. Since the carry bits are connected, the multiplier output is really summed with the entire first group.</p> |
