| 摘要 |
PURPOSE:To shorten the stop time of a microprocessor, etc. due to a refresh action by storing a fact that a refresh action is carried out in an idle cycle and controlling the execution and non-execution of refresh in each prescribed cycle. CONSTITUTION:When an idle cycle of a dynamic RAM8 is confirmed via a microprocessor 9, an address decoder 10, etc., an idle cycle confirming circuit 3 outputs a refresh request signal. The RAM8 is refreshed in response to said refresh request signal which passed through an OR circuit 6. This refreshing action is stored when it is completed, and a flag generating circuit 2 produces a flag signal of a high level. Then an AND circuit 5 is closed by an inverting circuit 4. The refresh request signals given periodically from a refresh timing generating circuit 1 are validated or invalidated according to whether a refresh action is completed or not within an idle cycle. Thus the refresh action is carried out only when necessary. As a result, a stop period of a microprocessor, etc. due to a refresh action is decreased.
|
