发明名称 JTAG TESTING OF BUSES USING PLUG-IN CARDS WITH JTAG LOGIC MOUNTED THEREON
摘要 A plug-in JTAG test card (200) includes JTAG boundary scan circuitry (230) which may be used to drive JTAG test data out onto portions of buses (170, 195) connected to peripheral slots (160, 180, 190). One or more of the JTAG plug-in test cards (200) can be used to verify the integrity of each of the point-to-point connections on the buses (170, 195) which terminate in the peripheral plug-in slots. In one advantageous embodiment, the plug-in JTAG test cards (200) simulate a dual in-line memory module (DIMM) or single in-line memory module (SIMM) cards which include scan test buffer circuitry (230) but do not actually include memory chip so that an inexpensive plug-in card (200) can be used to provide JTAG testing at the manufacturing level for multiple motherboards (600). In a particularly preferred embodiment, JTAG boundary scan buffer circuits (230), such as, for example, SN74ABT8245's, are used as test circuits rather than for their intended use as interface circuits.
申请公布号 WO9722013(A1) 申请公布日期 1997.06.19
申请号 WO1996US18228 申请日期 1996.11.13
申请人 AST RESEARCH, INC. 发明人 MOTE, L., RANDALL, JR.
分类号 G01R31/02;G01R31/28;G01R31/3185;G06F11/22;G06F11/267;(IPC1-7):G01R31/28 主分类号 G01R31/02
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