发明名称 DIGITALLY OPERATING ANALOG BUFFER AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To provide a digitally operating analog buffer amplifier which is small in circuit scale, fast and consumes small power without generating offset voltage. SOLUTION: The digitally operating analog buffer amplifier is comprised of a comparator CMPT, a level shifter LVSF and two switches SW, and configured such that when an output voltage approaches a proximity value of an input voltage (set voltage value), an input terminal IN and an output terminal OUT are short circuited by the switch SW to equalize the output voltage to the input voltage for preventing the occurrence of offset voltage, thereby it is possible to complete its operation while operating digitally and to reduce power consumption.
申请公布号 JP2002111407(A) 申请公布日期 2002.04.12
申请号 JP20000304617 申请日期 2000.10.04
申请人 UCHIDA YASUHISA 发明人 UCHIDA YASUHISA
分类号 H03F3/68;G06G7/122;H03F1/02;H03F1/56;H03F3/34;(IPC1-7):H03F3/34 主分类号 H03F3/68
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