| 摘要 |
PURPOSE:To improve the efficiency of data transmission by shortening the time from start signal transmission to data transmission according to the priority of every terminal. CONSTITUTION:Terminal A, terminal B and center C consist of processors CPU1 and CPUs 1', control part 2 and control parts 2', transmission part 3 and transmission parts 3', reception part 4 and reception parts 4', and transmission line 5. In this case, time t1 of terminal A with higher priority is shorter than time t2 of terminal B. Therefore, since terminal A with higher priority starts transmitting data to center C via transmission line 5 in waiting time t2 of terminal B, terminal B receives data via the common line, i.e. transmission line 5 and then inhibited (masked) from sending data out. The data transmission from terminal B is enabled after the data transmission from terminal A ends. In the figure, (a) and a' are start signals, (b) and b' start bits, (c) and c' data, (d) and d' parity bits, and (e) and e' stop bits. Thus, two or more terminals never transfer data simultaneously, providing normal data transmission. |
