| 摘要 |
PURPOSE:To make it possible to execute the parallel operation, further promote to execute it at a high speed, and simplify the processing of the complicated operation process, by forming the bus leading to the input of the prescribed operator at every prescribed operation, in the operation system of the information processing unit. CONSTITUTION:The operation is started by the instruction in the program, and in case when its operation instruction, for instance, the multiplying instruction is executed, this multiplying instruction is decoded, and the operation control is started by firmware of this instruction. If it is assumed that said multiplying instruction is that which has multiplied the first data group and the second data group by the first factor a1 and the second factor a2, respectively, the first and second groups are executed through each step in the scratch-pad memories SPM1, SPM2 and the operators AU1, AU2, respectively. Each step is advanced by generating in order the control of each constitution element by means of firmware. |
