发明名称 NOISE ELIMINATION CIRCUIT
摘要 PURPOSE:To eliminate noise in an input signal by varying a count between reference values when noise is invaded while the count of an up-down counter is converged into a 1st reference value or a 2nd reference value. CONSTITUTION:When a signal of an H level is inputted to a terminal 30 for a prescribed period, the count of an up-down counter 10 goes to H or L and it is given to a logic circuit 20. An output of an L level of the circuit 20 in this case is given to one terminal of the logic circuit 40. When a noise invades in an input signal at the terminal 30 and the level changes from H to L, the circuit 40 outputs a signal of an L level, the count is being decremented while the noise takes place thereby keeping an output at a terminal 60 to be an H level at all times. Then the input signal at the terminal 30 changes to an H level, the count is incremented and the circuit reaches the stable state. Furthermore, the similar operation as to noise of the input signal of an L level at the terminal 30 is implemented as above.
申请公布号 JPH04324709(A) 申请公布日期 1992.11.13
申请号 JP19910094148 申请日期 1991.04.24
申请人 SUMITOMO ELECTRIC IND LTD 发明人 TAWA KATSUHISA
分类号 H03K5/1252;H03K5/01 主分类号 H03K5/1252
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