发明名称 |
Nonvolatile charge trap memory device having a high dielectric constant blocking region |
摘要 |
An embodiment of a nonvolatile charge trap memory device is described. In one embodiment, the device comprises a channel comprising silicon overlying a surface on a substrate electrically connecting a first diffusion region and a second diffusion region of the memory device, and a gate stack intersecting and overlying at least a portion of the channel, the gate stack comprising a tunnel oxide abutting the channel, a split charge-trapping region abutting the tunnel oxide, and a multi-layer blocking dielectric abutting the split charge-trapping region. The split charge-trapping region includes a first charge-trapping layer comprising a nitride closer to the tunnel oxide, and a second charge-trapping layer comprising a nitride overlying the first charge-trapping layer. The multi-layer blocking dielectric comprises at least a high-K dielectric layer. |
申请公布号 |
US9431549(B2) |
申请公布日期 |
2016.08.30 |
申请号 |
US201213436875 |
申请日期 |
2012.03.31 |
申请人 |
Cypress Semiconductor Corporation |
发明人 |
Polishchuk Igor;Levy Sagy;Ramkumar Krishnaswamy |
分类号 |
H01L29/792;B82Y10/00;H01L21/28;H01L29/51;H01L29/66;H01L27/115 |
主分类号 |
H01L29/792 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device comprising:
a channel electrically connecting a first diffusion region and a second diffusion region of the memory device; and a gate stack adjoining at least a portion of the channel, the gate stack comprising a tunnel oxide abutting the channel, a charge-trapping layer abutting the tunnel oxide, and a multi-layer blocking dielectric abutting the charge-trapping layer, wherein the charge-trapping layer includes a first charge-trapping layer comprising an oxygen-rich nitride closer to the tunnel oxide, and a second charge-trapping layer comprising a silicon-rich nitride overlying the first charge-trapping layer, and wherein the multi-layer blocking dielectric comprises a first dielectric layer abutting the charge-trapping layer comprising an oxidized portion of the second charge-trapping layer and a second dielectric layer abutting the first dielectric layer, the first dielectric layer having a dielectric constant in the range of 3.5-4.5, and the second dielectric layer comprising a silicate and having a dielectric constant higher than a dielectric constant of the first dielectric layer. |
地址 |
San Jose CA US |