发明名称 COMPUTER
摘要 A computer, on which operating systems run, the computer comprising a virtualization function module configured to manage virtual computers. A operating system is configured to run on each of the virtual computers. The virtualization function module includes an interrupt controller. The interrupt controller is configured to hold vector information for managing host-side interrupt vectors, and interrupt vector allocation information for managing allocation of the host-side interrupt vectors to the guest-side interrupt vectors that are set by the operating systems. The virtualization function module is configured to analyze a state of allocation of the host-side interrupt vectors to the guest-side interrupt vectors, and change the allocation of the host-side interrupt vectors to the guest-side interrupt vectors based on a result of the analysis.
申请公布号 US2016364349(A1) 申请公布日期 2016.12.15
申请号 US201415121420 申请日期 2014.03.07
申请人 HITACHI, LTD. 发明人 OKADA Kazuaki;TOTSUKA Takao
分类号 G06F13/24;G06F9/455 主分类号 G06F13/24
代理机构 代理人
主权项 1. A computer, on which a plurality of operating systems run, the computer comprising, as physical resources: a processor; a volatile memory coupled to the processor; a non-volatile memory coupled to the processor; and at least one I/O device coupled to the processor, the computer comprising a virtualization function module configured to generate at least one virtual computer with use of the physical resources, and to manage the at least one virtual computer, wherein one of the plurality of operating systems is configured to run on each of the at least one virtual computer, wherein the one of the plurality of operating systems is configured to hold first vector information for managing guest-side interrupt vectors that are set in order for a virtual I/O device to notify interrupt, the virtual I/O device is allocated to one of the at least one virtual computer on which the one of the plurality of operating systems runs, wherein the virtualization function module includes an interrupt controller configured to execute processing for dealing with an interrupt notification from the at least one I/O device, wherein the interrupt controller is configured to hold: second vector information for managing host-side interrupt vectors that are set in order for the at least one I/O device included in the physical resources to notify interrupt; and interrupt vector allocation information for managing allocation of the host-side interrupt vectors to the guest-side interrupt vectors, wherein the guest-side interrupt vectors include unique interrupt vectors and shared interrupt vectors, each of the unique interrupt vectors being one of the guest-side interrupt vectors that is allocated one of the host-side interrupt vectors, the shared interrupt vectors being a plurality of guest-side interrupt vectors that share one of the host-side interrupt vectors, and wherein the interrupt controller is configured to: identify a guest-side interrupt vector to which a host-side interrupt vector is allocated, based on the interrupt vector allocation information in a case where an interrupt notification including the host-side interrupt vectors is received; send an interrupt notification including the identified guest-side interrupt vector to one of the plurality of operating systems, based on the second vector information and the interrupt vector allocation information, in a case where the identified guest-side interrupt vector is one of the unique interrupt vectors; identify the guest-side interrupt vector and one of the plurality of operating systems that is an interrupt destination by accessing the I/O device to which the host-side interrupt vector included in the interrupt notification is allocated, based on the second vector information and the interrupt vector allocation information, in a case where the identified guest-side interrupt vector is one of the shared interrupt vectors, and send an interrupt notification including the identified guest-side interrupt, vector to the identified one of the plurality of operating systems; analyze a state of allocation of the host-side interrupt vectors to the guest-side interrupt vectors; and change the allocation of the host-side interrupt vectors to the guest-side interrupt vectors based on a result of the analysis.
地址 Tokyo JP