Load/store operations in texture hardware

摘要

Approaches are disclosed for performing memory access operations in a texture processing pipeline having a first portion configured to process texture memory access operations and a second portion configured to process non-texture memory access operations. A texture unit receives a memory access request. The texture unit determines whether the memory access request includes a texture memory access operation. If the memory access request includes a texture memory access operation, then the texture unit processes the memory access request via at least the first portion of the texture processing pipeline, otherwise, the texture unit processes the memory access request via at least the second portion of the texture processing pipeline. One advantage of the disclosed approach is that the same processing and cache memory may be used for both texture operations and load/store operations to various other address spaces, leading to reduced surface area and power consumption.

主权项

1. A method for performing memory access operations in a texture processing pipeline having a first portion configured to process texture memory access operations and a second portion configured to process non-texture memory access operations, the method comprising:
receiving a first memory access request; determining whether the first memory access request comprises a texture memory access operation; and if the first memory access request comprises a texture memory access operation, then:
bypassing the at least a second portion of the texture processing pipeline, andprocessing the first memory access request via at least the first portion of the texture processing pipeline and a cache memory configured to store texture data and non-texture data; or if the first memory access request does not comprise a texture memory access operation, then processing the first memory access request via at least the second portion of the texture processing pipeline and the cache memory.