Low power architectures

摘要

Systems and methods for tuning a voltage are described herein. In one embodiment, a method comprises sending a data signal to first and second flops via a data path, latching in the data signal at the first flop using a clock signal, and latching the data signal at the second flop using a delayed version of the clock signal. The method also comprises detecting a mismatch between outputs of the first and second flops, and adjusting the voltage based on the detected mismatch.

主权项

1. A device for tuning a voltage, comprising:
a data path for propagating a data signal, wherein data path comprises a plurality of transistors, and the voltage is used to power the transistors in the data path; a first flop configured to receive the data signal from the data path, to receive a clock signal, and to latch the data signal using the clock signal; a second flop configured to receive the data signal from the data path, to receive a delayed version of the clock signal, and to latch the data signal using the delayed version of the clock signal; a circuit configured to detect a mismatch between outputs of the first and second flops; and a voltage adjuster configured to adjust the voltage based on the detected mismatch.