发明名称 Semiconductor device including superjunction structure formed using angled implant process
摘要 A semiconductor device includes a superjunction structure formed using simultaneous N and P angled implants into the sidewall of a trench. The simultaneous N and P angled implants use different implant energies and dopants of different diffusion rate so that after annealing, alternating N and P thin semiconductor regions are formed. The alternating N and P thin semiconductor regions form a superjunction structure where a balanced space charge region is formed to enhance the breakdown voltage characteristic of the semiconductor device.
申请公布号 US9595609(B2) 申请公布日期 2017.03.14
申请号 US201514860396 申请日期 2015.09.21
申请人 Alpha and Omega Semiconductor Incorporated 发明人 Padmanabhan Karthik;Bobde Madhur;Guan Lingpeng;Zhang Lei;Yilmaz Hamza
分类号 H01L29/66;H01L29/78;H01L29/06;H01L29/08;H01L29/10;H01L21/265 主分类号 H01L29/66
代理机构 Van Pelt, Yi & James LLP 代理人 Van Pelt, Yi & James LLP
主权项 1. A semiconductor device comprising: a heavily doped semiconductor substrate of a first conductivity type; a buffer layer of the first conductivity type formed on the semiconductor substrate; a semiconductor layer of a second conductivity type formed on the buffer layer, the semiconductor layer comprising a plurality of trenches formed in the semiconductor layer, the trenches extending close to, up to, or into the buffer layer, the trenches forming mesas in the semiconductor layer; a first thin semiconductor region of the first conductivity type formed near the trench sidewall surface of the mesas; second thin semiconductor regions of the second conductivity type formed near the trench sidewall surface of the mesas and formed sandwiching the first thin semiconductor region; an epitaxial layer formed on the trench sidewall surfaces of the mesas; and a first dielectric layer formed in the trenches, the first dielectric layer filling at least part of the trenches, wherein the first thin semiconductor region has a first thickness and a first doping concentration, the second thin semiconductor regions having a second thickness and a second doping concentration, and the mesa of the semiconductor layer having a third thickness and a third doping concentration, the first, second and third thicknesses and the first, second and third doping concentrations being selected to achieve charge balance in operation.
地址 Sunnyvale CA US