Array substrate comprising a barrier layer pattern and the method for manufacturing the same, and liquid crystal display device

摘要

The example of present invention provides an array substrate, the method for manufacturing the same, and a liquid crystal display device, wherein the array substrate comprises: a gate electrode, a gate insulating layer, a barrier layer pattern and an active semiconductor layer pattern formed by metal oxide semiconductor which are located on the gate insulating layer, a semiconductor protecting layer which covers the barrier layer pattern and the active semiconductor layer pattern, and has via holes at positions corresponding to the barrier layer pattern and the active semiconductor layer pattern; a data wire, a source electrode and a drain electrode formed by metal Cu, which are located at via holes. Metal Cu is used to form the data wire, the source electrode and the drain electrode, and the metal oxide semiconductor is used as the barrier layer for the metal Cu, and as a result, the diffusion of metal Cu into the layers such as the gate insulating layer etc., is prevented in the manufacturing process of TFT.

主权项

1. An array substrate, comprising:
a gate electrode; a gate insulating layer; a barrier layer pattern and an active semiconductor layer pattern, with each of the barrier layer pattern and an active semiconductor layer pattern being formed of a metal oxide semiconductor and being directly located on the top surface of the gate insulating layer, and wherein the barrier layer pattern is configured to increase an adhesion of metal Cu thin film and prevent metal Cu ion diffusing into the gate insulating layer; a semiconductor protecting layer, configured to cover the barrier layer pattern and the active semiconductor layer pattern, with via holes being formed in the semiconductor protecting layer and at top surface of the barrier layer pattern and the active semiconductor layer pattern; and a data wire, a source electrode and a drain electrode made of metal Cu, wherein the data wire connects to the barrier layer pattern through metal Cu in a corresponding via hole, the source electrode and the drain electrode connect to the active semiconductor layer pattern through metal Cu in corresponding via holes respectively, wherein the data wire fills the data wire corresponding via hole, the source electrode fills the source electrode corresponding via hole and the drain electrode fills the drain electrode corresponding via hole.