发明名称 WAFER LEVEL PACKAGE WITH TSV-LESS INTERPOSER
摘要 A semiconductor device includes an interposer having a first side and a second side opposite to the first side; a first semiconductor die mounted on the first side within a first chip mounting area through a plurality of first bumps; a second semiconductor die mounted on the first side within a second chip mounting area being adjacent to the first chip mounting area; a ring-shaped supporting feature disposed on the first side and encompassing the first chip mounting area and the second chip mounting area; and a plurality of solder bumps mounted on the second side.
申请公布号 US2017110419(A1) 申请公布日期 2017.04.20
申请号 US201514883632 申请日期 2015.10.15
申请人 INOTERA MEMORIES, INC. 发明人 Shih Shing-Yih;Chiang Hsu
分类号 H01L23/58;H01L25/065;H01L23/498;H01L23/552 主分类号 H01L23/58
代理机构 代理人
主权项 1. A semiconductor device, comprising: an interposer having a first side and a second side opposite to the first side; a first semiconductor die mounted on the first side within a first chip mounting area through a plurality of first bumps, wherein the first semiconductor die has a top surface and sidewall surfaces contiguous with the top surface; a second semiconductor die mounted on the first side within a second chip mounting area being adjacent to the first chip mounting area; a shielding feature directly disposed on the top surface and the sidewall surfaces of the first semiconductor die; a ring-shaped supporting feature disposed on the first side and encompassing the first chip mounting area and the second chip mounting area; and a plurality of solder bumps mounted on the second side.
地址 Taoyuan City TW