| 主权项 |
1. A memory system comprising:
a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices, wherein the first and second memories are separated from the processor, wherein the processor accesses the second memory device through the first memory device, wherein the first memory controller transfers a signal between the processor and the second memory device based on at least one of values of a memory selection field and a handshaking information field included in the signal, wherein the first memory includes a high-capacity memory, which has a lower latency than the second memory and operates as a cache memory for the second memory, and a high-speed memory, which has a lower latency than the high-capacity memory and operates as a cache memory for the high-capacity memory, and wherein the first memory controller includes a high-capacity memory cache controller suitable for controlling the high-capacity memory to store data, and a high-speed memory cache controller suitable for controlling the high-speed memory to store data. |
