| 发明名称 |
CLOCK CONTROL DEVICE |
| 摘要 |
A clock control device is disclosed, which relates to a technology for changing a rising or falling edge trigger. The clock control device includes: a flip-flop configured to latch data in response to a delay clock signal; and a clock controller configured to output the delay clock signal by delaying a clock signal, and control the data to be triggered at a falling edge of the clock signal when the clock signal is input at a time earlier than the data. |
| 申请公布号 |
US2017110168(A1) |
申请公布日期 |
2017.04.20 |
| 申请号 |
US201614992614 |
申请日期 |
2016.01.11 |
| 申请人 |
SK hynix Inc. |
发明人 |
LEE Dong Beom |
| 分类号 |
G11C7/22;G11C7/10;G11C7/08 |
主分类号 |
G11C7/22 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A clock control device comprising:
a flip-flop configured to latch data in response to a delay clock signal; and a clock controller configured to output the delay clock signal by delaying a clock signal, and control the data to be triggered at a falling edge of the clock signal when the clock signal is input at a time earlier than the data wherein the clock controller includes: a first option unit configured to output a first delay clock signal by inverting a phase of a first clock signal or bypass the phase of the clock signal and output the bypassed result as the first delay clock signal. |
| 地址 |
Icheon-si KR |
