发明名称 |
PLANAR VARIABLE RESISTANCE MEMORY |
摘要 |
An example memory device includes a planar semiconductor substrate layer; a planar variable resistance layer disposed above the planar semiconductor substrate layer; a planar channel layer disposed above the planar variable resistance layer; and one or more gates positioned along a length of the memory device and above the planar channel layer, wherein each respective gate of the one or more gates is configured to direct at least a portion of a current flowing through a respective region of the planar channel layer positioned below the respective gate into a respective region of the variable resistance layer positioned below the respective gate in response to a voltage applied to the respective gate being greater than a threshold voltage. |
申请公布号 |
US2017103808(A1) |
申请公布日期 |
2017.04.13 |
申请号 |
US201514882147 |
申请日期 |
2015.10.13 |
申请人 |
HGST Netherlands B.V. |
发明人 |
Franca-Neto Luiz M. |
分类号 |
G11C13/00;H01L45/00 |
主分类号 |
G11C13/00 |
代理机构 |
|
代理人 |
|
主权项 |
1. A memory device comprising:
a planar semiconductor substrate layer; a planar variable resistance layer disposed above the planar semiconductor substrate layer; a planar channel layer disposed above the planar variable resistance layer; and one or more gates positioned along a length of the memory device and above the planar channel layer, wherein each respective gate of the one or more gates is configured to direct at least a portion of a current flowing through a respective region of the planar channel layer positioned below the respective gate into a respective region of the variable resistance layer positioned below the respective gate in response to a voltage applied to the respective gate being greater than a threshold voltage. |
地址 |
Amsterdam NL |