发明名称 |
Method and System for Increasing Efficiency and Controlling Slew Rate in DC-DC Converters |
摘要 |
One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level. |
申请公布号 |
US2017093283(A1) |
申请公布日期 |
2017.03.30 |
申请号 |
US201615090659 |
申请日期 |
2016.04.05 |
申请人 |
Intersil Americas LLC |
发明人 |
Leoncini Alexandro;Kohler Edward;Lok Timmy |
分类号 |
H02M3/158;H03K5/24;H03K5/04;H03K17/687;H03K19/0185 |
主分类号 |
H02M3/158 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus, comprising:
a first driver having first and second inputs, and first and second outputs; wherein the first output is configured to be coupled to a first terminal of a first slew resistor having a second terminal coupled to an input of a first power transistor; wherein the second output is configured to be coupled to a third terminal of a second slew resistor having a fourth terminal coupled to the input of the first power transistor; a second driver having third and fourth inputs and third and fourth outputs; wherein the third output is configured to be coupled to a fifth terminal of a third slew resistor also having a sixth terminal coupled to an input of a second power transistor; wherein the fourth output is configured to be coupled to a seventh terminal of a fourth slew resistor also having an eighth terminal coupled to an input of the second power transistor; wherein the first output is coupled to the fourth input; wherein the third output is coupled to the second input; wherein the first input is configured to receive an enable signal; wherein the third input is configured to receive a complementary enable signal; wherein the first output is configured to directly sense a voltage at the input of the first power transistor upon the first power transistor beginning to be turned off; and wherein the third output is configured to directly sense a voltage at the input of the second power transistor upon the second power transistor beginning to be turned off. |
地址 |
Milpitas CA US |