发明名称 Apparatus and method for floating-point multiplication
摘要 An apparatus and method for floating-point multiplication are provided. Two partial products are generated from two operand significands. An unbiased result exponent is determined from operand exponent values and leading zero counts (e.g. if one of the operands is denormal), and a shift amount and direction for a product significand as needed for a predetermined minimum exponent value of a predetermined canonical format. First and second rounding values for injection into addition of the partial products are generated by shifting a predetermined rounding pattern by the shift amount in an opposite shift direction for the first rounding value and left shifting by one bit the first rounding value to give the second. The first and second partial products are added together with the first rounding value to give a first product significand, and are added together with the second rounding value to give a second product significand. These product significands are shifted by the shift amount in the shift direction and one is then selected in order to generate a formatted significand in the predetermined canonical format. This selection can depend on whether the result mantissa has overflown, based on an overflow mask shifted by the shift amount.
申请公布号 GB2542652(A) 申请公布日期 2017.03.29
申请号 GB20160010092 申请日期 2016.06.09
申请人 ARM Limited 发明人 David Raymond Lutz
分类号 G06F7/487;G06F7/499;G06F7/53 主分类号 G06F7/487
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