发明名称 Demand-Controlled, Low Standby Power Linear Shunt Regulator
摘要 A shunt regulator for use in a power converter having an energy transfer element for regulating a transfer energy of the output signal delivered to the load. An auxiliary winding of the energy transfer element being utilized to produce an internal bypass voltage, VBP, at a bypass pin coupled to an external capacitive load, the shunt regulator including a two-mode operational amplifier that produces an output signal that controls a shunt current through the shunt switch. At power-up, or at low load conditions, the operational amplifier operates in a low-power mode of operation with low quiescent current. When a current comparator circuit senses that the shunt current exceeds a predetermined level, the current comparator circuit sets a latch which produces a logical signal that causes the operational amplifier to switch to a high-power mode of operation.
申请公布号 US2017085182(A1) 申请公布日期 2017.03.23
申请号 US201514858823 申请日期 2015.09.18
申请人 Power Integrations, Inc. 发明人 Colbeck Roger
分类号 H02M3/335 主分类号 H02M3/335
代理机构 代理人
主权项 1. A shunt regulator for use in a power converter having an energy transfer element with an input side that receives an ac line, and an output side that delivers an output signal to a load, a power switch being coupled to a primary winding of the energy transfer element for regulating a transfer energy of the output signal delivered to the load, an auxiliary winding of the energy transfer element being utilized to produce an internal bypass voltage, VBP, at a bypass pin coupled to an external capacitive load, the shunt regulator comprising: a shunt switch coupled between the bypass pin and a ground potential; an operational amplifier (op-amp) that produces an output signal that controls a shunt current through the shunt switch, the op-amp including: a first input coupled to receive a reference voltage;a second input coupled to a divider circuit that provides a fractional voltage of the internal bypass voltage at the second input;a third input coupled to receive a logical signal, when the logical signal is in a first logical state the op-amp operates in a closed-loop, low-power mode that regulates the internal bypass voltage to a first voltage level, and when the logical signal is in a second logical state the op-amp operates in a closed-loop, high-power mode that regulates the internal bypass voltage to a second voltage level that is higher than the first voltage level;a latch that outputs the logical signal; andcurrent comparator circuitry that drives the latch, the current comparator circuitry being coupled to sense the shunt current, when the shunt current exceeds a predetermined level the current comparator circuitry causing the logical signal output by the latch to transition from the first logical state to the second logical state, thereby switching the op-amp from the low-power mode to the high-power mode of operation.
地址 San Jose CA US