发明名称 |
BROADCAST CHANNEL ARCHITECTURES FOR BLOCK-BASED PROCESSORS |
摘要 |
Apparatus and methods are disclosed for example computer processors that are based on a hybrid dataflow execution model. In particular embodiments, a processor core in a block-based processor comprises: one or more functional units configured to perform functions using one or more operands; an instruction window comprising buffers configured to store individual instructions for execution by the processor core, the instruction window including one or more operand buffers for an individual instruction configured to store operand values; a control unit configured to execute the instructions in the instruction window and control operation of the one or more functional units; and a broadcast value store comprising a plurality of buffers dedicated to storing broadcast values, each buffer of the broadcast value store being associated with a respective broadcast channel from among a plurality of available broadcast channels. |
申请公布号 |
WO2017048651(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
WO2016US51412 |
申请日期 |
2016.09.13 |
申请人 |
MICROSOFT TECHNOLOGY LICENSING, LLC |
发明人 |
BURGER, Douglas C.;SMITH, Aaron L. |
分类号 |
G06F12/0806;G06F9/38 |
主分类号 |
G06F12/0806 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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