发明名称 Methods, apparatus and system for voltage ramp testing
摘要 At least one method and system disclosed herein involves testing of integrated circuits. A device having at least one transistor and at least one dielectric layer is provided. A first voltage is provided during a first time period for performing a stress test upon the device. A second voltage is provided during a second time period for discharging at least a portion of the charge built-up as a result of the first voltage. The second voltage is of an opposite polarity of the first voltage. A sense function is provided during a third time period for determining a result of the stress test. Data relating to a breakdown of the dielectric layer based upon the result of the stress test is acquired, stored and/or transmitted.
申请公布号 US9599656(B2) 申请公布日期 2017.03.21
申请号 US201414553863 申请日期 2014.11.25
申请人 GLOBALFOUNDRIES INC.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Uppal Suresh;Kerber Andreas;McMahon William;Cartier Eduard A.
分类号 G01R31/00;G01R31/14;G01R31/28 主分类号 G01R31/00
代理机构 Williams Morgan, P.C. 代理人 Williams Morgan, P.C.
主权项 1. A method, comprising: providing a device having at least one transistor and at least one dielectric layer; providing a first voltage during a first time period for performing a stress test upon said device; providing a second voltage during a second time period for discharging at least a portion of the charge built-up as a result of said first voltage, wherein said second voltage is of an opposite polarity of said first voltage; performing a sense function during a third time period for determining a result of said stress test; and performing at least one of acquiring, storing, or transmitting data relating to a breakdown of said dielectric layer based upon said result of said stress test.
地址 Grand Cayman KY