Assuring chip reliability with automatic generation of drivers and assertions

摘要

A computer-implemented method may include retrieving a design netlist with a processor, identifying, via the processor, a logic structure in the design netlist, generating, via the processor, a driver based on the logic structure, applying, via the processor, a simulation and a formal model based on the driver, and testing, via the processor, an output of the simulation and the formal model.

主权项

1. A computer-implemented method for assuring a reliability of a chip comprising:
verifying a parity with a processor; traversing, via the processor, a netlist back from a plurality of netlist outputs; identifying, via the processor, one or more parity protected structures and one or more gates,
wherein protected parity structures comprises a duplication protection; andgenerating, via the processor, a driver based on a logic structure and an assertion indicative of a parity validity.