主权项 |
1. A semiconductor memory device, comprising:
a memory cell array that includes a plurality of memory cells and a plurality of first conducting layers, the memory cells being arrayed in a three-dimensional manner, the first conducting layers being connected to the memory cells and being arrayed in a laminating direction; and stepped wiring portions disposed on a first side portion of the memory cell array and a second side portion thereof, the second side portion being different from the first side portion, the stepped wiring portion including a plurality of second conducting layers, the plurality of second conducting layers being connected to the first conducting layers, wherein at least one of the plurality of second conducting layers includes a contact formation area on a top surface thereof in the stepped wiring portion positioned on the first side portion side, and other ones of the plurality of second conducting layers includes a contact formation area on a top surface thereof in the stepped wiring portion positioned on the second side portion side. |