发明名称 |
BINARY TRANSLATION FOR MULTI-PROCESSOR AND MULTI-CORE PLATFORMS |
摘要 |
Technologies for partial binary translation on multi-core platforms include a shared translation cache, a binary translation thread scheduler, a global installation thread, and a local translation thread and analysis thread for each processor core. On detection of a hotspot, the thread scheduler first resumes the global thread if suspended, next activates the global thread if a translation cache operation is pending, and last schedules local translation or analysis threads for execution. Translation cache operations are centralized in the global thread and decoupled from analysis and translation. The thread scheduler may execute in a non-preemptive nucleus, and the translation and analysis threads may execute in a preemptive runtime. The global thread may be primarily preemptive with a small non-preemptive nucleus to commit updates to the shared translation cache. The global thread may migrate to any of the processor cores. Forward progress is guaranteed. Other embodiments are described and claimed. |
申请公布号 |
EP3014423(A4) |
申请公布日期 |
2017.03.15 |
申请号 |
EP20130887955 |
申请日期 |
2013.06.28 |
申请人 |
Intel Corporation |
发明人 |
SARKAR, Abhik;LU, Jiwei;SHANMUGAVELAYUTHAM, Palanivelrajan, Rajan;AGRON, Jason, M.;YAMADA, Koichi |
分类号 |
G06F9/455;G06F9/445;G06F9/48;G06F9/50;G06F12/02;G06F12/0802 |
主分类号 |
G06F9/455 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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