| 摘要 |
The present invention relates to the field of manufacturing technologies of semiconductor power devices, and more particularly to a method for manufacturing a split-gate power device. In the method for manufacturing a split-gate power device according to the present invention, lateral etching is added to form lateral recesses of a control gate groove below a first insulating film in a process of forming the control gate groove by etching, and therefore, after a first conductive film is deposited, the first conductive film can be directly etched by using the first insulating film as a mask to form control gates. The technical process of the present invention is simplified, reliable and easy to control, and can greatly improve the yield of the split-gate power device. The present invention is particularly suitable for the manufacture of 25V-200V semiconductor power devices. |
| 主权项 |
1. A method for manufacturing a split-gate power device, comprising the following basic steps:
Step 1: forming a first insulating film on a substrate epitaxial layer of a first doping type, performing first photoetching, and etching the first insulating film to form an opening of the first insulating film in the first insulating film; Step 2: etching the substrate epitaxial layer by using the first insulating film as a mask to form a control gate groove in the substrate epitaxial layer, two side edges of the control gate groove extending below the first insulating film at two sides of the opening of the first insulating film to form lateral recesses below the first insulating film; Step 3: forming a second insulating film on the surface of the control gate groove, and depositing a first conductive film, the first conductive film at least filling the lateral recesses at the two sides of the control gate groove and below the first insulating film; Step 4: etching away a part of the first conductive film above the first insulating film, and further etching the first conductive film along the edge of the opening of the first insulating film to form control gates at the two sides of the control gate groove; Step 5: etching the exposed second insulating film, depositing and etching-back a third insulating film to form third insulating film dielectric layers on side walls of the control gates, and etching the substrate epitaxial layer along the edges of the third insulating film dielectric layers to form a split-gate groove; Step 6: forming a fourth insulating film on the surface of the split-gate groove; Step 7: etching the third insulating film dielectric layers, and forming a fifth insulating film on the exposed surfaces of the control gates; Step 8: depositing and etching-back a second conductive film to form a split-gate in the split-gate groove, the surface of the split-gate being slightly lower than the surface of the substrate epitaxial layer; Step 9: etching the first insulating film, performing ion implantation of a second doping type to form a channel region in the substrate epitaxial layer, and performing second photoetching and ion implantation of the first doping type to form a source region in the substrate epitaxial layer; Step 10: depositing a sixth insulating film and performing third photoetching to form contact hole patterns, etching the sixth insulating film to form contact holes, and performing ion implantation of the second doping type and depositing a metal layer to form ohmic contact; and Step 11: performing fourth photoetching, and etching the metal layer to respectively form a source electrode, a control gate electrode, and a split-gate electrode. |
