发明名称 Display device and display drive method
摘要 A display device includes: a pixel array including pixel circuits arranged in a matrix, each pixel circuit having a light emitting element, a drive transistor, and a storage capacitor storing a threshold voltage of the transistor and an inputted signal value; and a threshold correction operation means for performing a threshold correction operation plural times, which allows the storage capacitor to store the threshold voltage by applying a drive voltage to the transistor in a state where a gate potential of the transistor is fixed in a reference potential before giving the signal value to the storage capacitor. The threshold correction operation is started in a state where the gate potential is made a correction acceleration potential higher than the reference potential only at the threshold correction operation of the first half in the plural threshold correction operations, then, returns the gate potential to the reference potential to be fixed.
申请公布号 US9583040(B2) 申请公布日期 2017.02.28
申请号 US200912461132 申请日期 2009.08.03
申请人 JOLED Inc. 发明人 Yamashita Junichi;Uchino Katsuhide
分类号 G09G3/30;G09G3/32 主分类号 G09G3/30
代理机构 Michael Best & Friedrich LLP 代理人 Michael Best & Friedrich LLP
主权项 1. A display device for displaying image frames of a video signal, the display device comprising: a pixel array including pixel circuits arranged in a matrix state, signal lines, and row scanning lines, in which each of the pixel circuits has at least: a light emitting element,a drive transistor that has a source electrode connected to the light emitting element, wherein the drive transistor is configured to apply an electric current to the light emitting element, the magnitude of the electric current supplied to the light emitting element depending on a gate-source voltage between a gate electrode of the drive transistor and the source electrode of the drive transistor,a switching transistor having an input terminal connected to one of the signal lines, an output terminal connected to a first node, the first node being connected to the gate electrode of the drive transistor, and a gate electrode connected to one of the row scanning lines, where the switching transistor controls an electrical connection between the one of the signal lines and the first node, anda storage capacitor that has a first terminal connected to the first node and a second terminal connected to the source electrode of the drive transistor; and a driving circuit configured to selectively supply a gradation potential, a reference potential that is different from the gradation potential, and an acceleration potential that is lower than the gradation potential and higher than the reference potential to the input terminal of the switching transistor of a given one of the pixel circuits via the signal lines, selectively supply a drive potential to a drain electrode of the drive transistor of each of the pixel circuits, and selectively supply an ON potential and an OFF potential to the gate electrode of the switching transistor of the given one of the pixel circuits via the row scanning lines, such that: the acceleration potential is supplied to the one of the signal lines that is connected to the given one of the pixel circuits from at least a first timing until a second timing;the reference potential is supplied to the one of the signal lines that is connected to the given one of the pixel circuits from at least the second timing until a third timing;the ON potential is supplied to the one of the row scanning lines that is connected to the given one of the pixel circuits from at least the first timing until the third timing; andthe drive potential is supplied to the drain electrode of the drive transistor of the given one of the pixel circuits from at least the first timing until the third timing; wherein the first timing occurs after the given one of the pixel circuits ends all of a light emission for a given image frame of the image frames, the given image frame not being a final image frame of the image frames, the second timing occurs after the first timing, and the third timing occurs after the second timing and before a fourth timing, the fourth timing being a timing at which the supply to the given one of the pixel circuits of the gradation potential for the given one of the pixel circuits for a next image frame of the image frames begins, the next image frame following immediately after the given image frame.
地址 Tokyo JP