Back-end transistors with highly doped low-temperature contacts

摘要

A back end of line device and method for fabricating a transistor device include a substrate having an insulating layer formed thereon and a channel layer formed on the insulating layer. A gate structure is formed on the channel layer. Dopants are implanted into an upper portion of the channel layer on opposite sides of the gate structure to form shallow source and drain regions using a low temperature implantation process. An epitaxial layer is selectively grown on the shallow source and drain regions to form raised regions above the channel layer and against the gate structure using a low temperature plasma enhanced chemical vapor deposition process, wherein low temperature is less than about 400 degrees Celsius.

主权项

1. A method for fabricating a transistor device, comprising:
providing a substrate having an insulating layer formed thereon and a channel layer formed on the insulating layer; forming a gate structure on the channel layer; growing a doped epitaxial layer selectively onto exposed portions of the channel layer adjacent to the gate structure using a low temperature plasma enhanced chemical vapor deposition process, wherein low temperature is less than about 400 degrees Celsius; and driving dopants into an upper portion of the channel layer below the epitaxial layer on opposite sides of the gate structure to form shallow source and drain regions using an anneal process at the low temperature, wherein the shallow source and drain regions do not extend to the insulating layer.