| 主权项 |
1. A voltage regulator comprising
an amplification stage configured to control a voltage level of a first gain node and of a second gain node in response to an input voltage at an input node, in order to activate a first and a second output stage, respectively; wherein the second gain node is different from the first gain node; the first output stage configured to source a current at an output node of the voltage regulator from a first potential, in dependence of the voltage level of the first gain node; wherein the first output stage is activated if the current which is sourced at the output node exceeds a pre-determined first maintenance current; the second output stage configured to sink a current at the output node to a second potential, in dependence of the voltage level of the second gain node; wherein the first potential is different from the second potential; wherein the second output stage is activated if the current which is sunk at the output node exceeds a pre-determined second maintenance current; and a first operating point control circuit configured to set the voltage level of the first gain node such that the first maintenance current is sourced by the first output stage, when the second output stage is activated; and/or a second operating point control circuit configured to set the voltage level of the second gain node such that the second maintenance current is sunk by the second output stage, when the first output stage is activated,wherein
the first output stage comprises
a first control transistor having a gate which is coupled to the first gain node, and being configured to vary a first control current through the first control transistor, subject to a voltage level at the first gain node; anda first output amplifier configured to source an amplified version of the first control current to the output node; and/or the second output stage comprises
a second control transistor having a gate which is coupled to the second gain node, and being configured to vary a second control current through the second control transistor, subject to a voltage level at the second gain node; anda second output amplifier configured to sink an amplified version of the second control current at the output node;wherein
the first output amplifier comprises a first current mirror with a first diode transistor and a first output transistor; the first diode transistor is arranged in series with the first control transistor such that the first diode transistor is traversed by the first control current; a drain of the first output transistor is coupled to the output node; the first output transistor is traversed by the amplified version of the first control current, which is sourced at the output node; the second output amplifier comprises a second current mirror with a second diode transistor and a second output transistor; the second diode transistor is arranged in series with the second control transistor such that the second diode transistor is traversed by the second control current; a drain of the second output transistor is coupled to the output node; andthe second output transistor is traversed by the amplified version of the second control current, which is sunk at the output node. |
