发明名称 Stacked packaging improvements
摘要 A plurality of microelectronic assemblies are made by severing an in-process unit including an upper substrate and lower substrate with microelectronic elements disposed between the substrates. In a further embodiment, a lead frame is joined to a substrate so that the leads project from this substrate. Lead frame is joined to a further substrate with one or more microelectronic elements disposed between the substrates.
申请公布号 US9570416(B2) 申请公布日期 2017.02.14
申请号 US201514870827 申请日期 2015.09.30
申请人 Tessera, Inc. 发明人 Haba Belgacem;Mitchell Craig S.;Beroz Masud
分类号 H01L23/02;H01L23/00;H01L23/498;H01L25/10;H01L21/78;H01L21/56;H01L23/495;H01L25/18;H01L25/00 主分类号 H01L23/02
代理机构 Lerner, David, Littenberg, Krumholz & Mentlik, LLP 代理人 Lerner, David, Littenberg, Krumholz & Mentlik, LLP
主权项 1. A microelectronic unit including upper and lower substrates and at least one microelectronic elements disposed between said upper and lower substrates, said upper substrate including a top surface and an opposed bottom surface facing toward said at least one microelectronic element, and said lower substrate including a top surface facing toward said at least one microelectronic element, said upper substrate including a first region aligned with a second region of said lower substrate, said at least one said microelectronic element disposed therebetween, said first and second regions having respective first and second electrically conductive elements, said first electrically conductive element of said first region being disposed at said bottom surface of said upper substrate and said second electrically conductive element of said second region being disposed at said top surface of said lower substrate, said upper substrate being electrically connected to said second electrically conductive element of the corresponding region of said lower substrate; and electrically conductive spacing elements joined to said first and second electrically conductive elements, said electrically conductive spacing elements disposed on opposed sides of said at least one microelectronic element and each having a height extending from said first conductive element to said second conductive element.
地址 San Jose CA US