SYMMETRICAL CAPACITOR ARRAYS SUCCESIVE APPROXIMATION REGISTER (SAR) ANALOG-TO-DIGITAL CONVERTER (ADC)

摘要

Analog-to-digital converter (ADC) circuitry includes a first binary-weighted capacitor array having a total capacitance of 2n-2C. The value of n represents number of bits of a digital signal that represents an analog signal. The ADC circuitry also includes a second binary-weighted capacitor array having a total capacitance of 2n-2C. In addition to that, the ADC circuitry further includes a comparator circuit having first and second terminals. The first terminal is coupled to the first binary-weighted capacitor array, and the second terminal is coupled to the second binary weighted capacitor array. The switching circuit within the second binary-weighted capacitor array may be configurable to couple a largest capacitance capacitor within the second binary-weighted capacitor array from remaining capacitors within the second binary weighted capacitor array.

主权项

1. Analog-to-digital converter (ADC) circuitry, comprising:
first and second binary-weighted capacitor arrays, wherein each first and second binary-weighted capacitor array is having a total capacitance of 2n-2C, wherein n represents a number of bits of a digital signal representing an analog signal; a comparator circuit having first and second terminals, wherein the first terminal is coupled to the first binary-weighted capacitor array, and the second terminal is coupled to the second binary weighted capacitor array; and a switching circuit within the second binary-weighted capacitor array is configurable to couple a largest capacitance capacitor within the second binary-weighted capacitor array from remaining capacitors within the second binary weighted capacitor array.