发明名称 PACKAGE-ON-PACKAGE SEMICONDUCTOR ASSEMBLY HAVING BOTTOM DEVICE CONFINED BY DIELECTRIC RECESS
摘要 A package-on-package semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between two both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, another semiconductor device is disposed over a top surface of the core base and is electrically coupled to the semiconductor device in the dielectric recess through a buildup circuitry under a bottom surface of the core base.
申请公布号 US2017033083(A1) 申请公布日期 2017.02.02
申请号 US201615015050 申请日期 2016.02.03
申请人 BRIDGE SEMICONDUCTOR CORPORATION 发明人 Lin Charles W. C.;Wang Chia-Chung
分类号 H01L25/065;H01L23/528;H01L23/538;H01L23/31;H01L23/498;H01L23/00 主分类号 H01L25/065
代理机构 代理人
主权项 1. A package-on-package semiconductor assembly, comprising: a core base that includes a dielectric layer, a resin sealant layer and an array of metal posts, wherein (i) the dielectric layer has a recess extending from a top surface of the dielectric layer, (ii) the resin sealant layer is disposed over the top surface of the dielectric layer, and (iii) the metal posts are disposed in the resin sealant layer; a first semiconductor device that is laterally confined by the recess of the dielectric layer and has active pads attached to a floor of the recess of the dielectric layer by an adhesive; a bottom buildup circuitry under a bottom surface of the core base, wherein the bottom buildup circuitry is electrically coupled to the active pads of the first semiconductor device through metallized vias that extend through the adhesive and the dielectric layer and is further electrically coupled to the metal posts through additional metallized vias that extend through the dielectric layer; and a second semiconductor device over a top surface of the core base, wherein the second semiconductor device is electrically coupled to the first semiconductor device through the metal posts and the bottom buildup circuitry.
地址 Taipei TW