发明名称 |
Method, apparatus, and instructions for safely storing secrets in system memory |
摘要 |
Embodiments of an invention for method, apparatus, and instructions for safely storing secrets in system memory are disclosed. In one embodiment, a processor includes a hardware key, an instruction unit, and an encryption unit. The instruction unit is to receive an encryption instruction and a compare instruction. The encryption instruction is to have a first plaintext input value. The compare instruction is to have a second plaintext input value. The encryption unit is to, in response to the encryption instruction, encrypt the first plaintext input value using the hardware key to generate a ciphertext value, and, in response to the compare instruction, decrypt the ciphertext value using the hardware key to generate a plaintext output value and compare the plaintext output value to the second plaintext input value. |
申请公布号 |
US9559848(B2) |
申请公布日期 |
2017.01.31 |
申请号 |
US201414467425 |
申请日期 |
2014.08.25 |
申请人 |
INTEL CORPORATION |
发明人 |
Gueron Shay |
分类号 |
H04L9/32;H04L9/08 |
主分类号 |
H04L9/32 |
代理机构 |
Nicholson De Vos Webster & Elliott LLP |
代理人 |
Nicholson De Vos Webster & Elliott LLP |
主权项 |
1. A processor comprising:
a hardware key; an instruction unit to receive an encryption instruction and a compare instruction, the encryption instruction having a first plaintext input value and the compare instruction having a second plaintext input value; and an encryption unit to, in response to the encryption instruction, encrypt the first plaintext input value using the hardware key to generate a ciphertext value, and, in response to the compare instruction, decrypt the ciphertext value using the hardware key to generate a plaintext output value and compare the plaintext output value to the second plaintext input value. |
地址 |
Santa Clara CA US |