FinFETs with Multiple Threshold Voltages

摘要

A device includes a substrate, a semiconductor fin over the substrate, and a gate dielectric layer on a top surface and sidewalls of the semiconductor fin. A gate electrode is spaced apart from the semiconductor fin by the gate dielectric layer. The gate electrode includes a top portion over and aligned to the semiconductor fin, and a sidewall portion on a sidewall portion of the dielectric layer. The top portion of the gate electrode has a first work function, and the sidewall portion of the gate electrode has a second work function different from the first work function.

主权项

1. A method comprising:
forming a gate dielectric on a semiconductor fin, wherein the gate dielectric comprises a top portion over a top surface of the semiconductor fin, and a sidewall portion on a sidewall of the semiconductor fin; forming a first metal layer over the gate dielectric, wherein the first metal layer comprises a first top portion overlapping the semiconductor fin, and a first sidewall portion on a sidewall of the sidewall portion of the gate dielectric; etching the first metal layer, wherein the sidewall portion of the first metal layer is removed; and depositing a second metal layer, wherein the second metal layer comprises a second top portion over the first top portion of the first metal layer, and a second sidewall portion extending on the sidewall portion of the gate dielectric, and wherein the first and the second metal layers comprise different materials.