| 发明名称 | Airgap protection layer for via alignment | ||
| 摘要 | A method for via alignment includes forming first airgaps between interconnect structures and depositing a pinch off layer to close off openings to the first airgaps. A protection layer is formed in divots in the pinch off layer. The protection layer and the pinch off layer are planarized to form a surface where the protection layer remains in the divots. An interlevel dielectric layer (ILD) is deposited on the surface. The ILD and the pinch off layer are etched using the protection layer as an etch stop to align a via and expose the interconnect structure through the via. | ||
| 申请公布号 | US9553019(B1) | 申请公布日期 | 2017.01.24 |
| 申请号 | US201615130166 | 申请日期 | 2016.04.15 |
| 申请人 | International Business Machines Corporation | 发明人 | Briggs Benjamin D.;Clevenger Lawrence A.;Penny Christopher J.;Rizzolo Michael |
| 分类号 | H01L21/768;H01L23/522;H01L23/532 | 主分类号 | H01L21/768 |
| 代理机构 | Tutunjian & Bitetto, P.C. | 代理人 | Tutunjian & Bitetto, P.C. ;Davis Jennifer R. |
| 主权项 | 1. A method for via alignment, comprising: forming first airgaps between interconnect structures; depositing a pinch off layer to close off openings to the first airgaps; forming a protection layer in divots formed in the pinch off layer; planarizing the protection layer and the pinch off layer to form a surface where the protection layer remains in the divots; depositing an interlevel dielectric layer (ILD) on the surface; and etching the ILD and the pinch off layer using the protection layer as an etch stop to form and align a via and expose the interconnect structure through the via. | ||
| 地址 | Armonk NY US | ||