INTERFACE CIRCUIT FOR COMMUNICATION, AND SYSTEM INCLUDING THE SAME

摘要

A system may include a processor and a memory. The processor and the memory may communicate with each other in a balanced code multiphase signal transmission scheme. The processor and the memory may include interface circuits, respectively. The interface circuit may generate data based on multiphase symbols. For example, the interface circuit may include a decoding block which generates 5-bit data based on 2 symbols which are successively inputted.

主权项

1. An interface circuit comprising:
a decoding block configured to successively receive symbols and each of the symbols having phases, and generate data having a number of bits based on the symbols, wherein data of a byte including the number of bits is masked where a combination of the symbols correspond to data masking information.