All Digital Phase Locked Loop

摘要

An all-digital phase-locked loop (AD-PLL) and related methods and computer readable medium are provided. The AD-PLL comprises a reference phase generator for receiving a digital signal and splitting the digital signal into an integer part and a fractional part, an estimator block for estimating a control signal, and a digital-to-time converter for receiving the estimated control signal and a reference clock signal and for deriving a delayed reference clock signal. The AD-PLL also includes a time-to-digital converter for receiving the delayed reference clock signal and a desired clock signal phase, and for deriving a fractional phase error. The estimator block receives the fractional phase error and determines the estimated control signal by correlating the fractional phase error with the fractional part, yielding a correlated signal, multiplying the correlated signal with its absolute value, and integrating the outcome of the multiplying to obtain the estimated control signal.

主权项

1. An all-digital phase-locked loop comprising:
a reference phase generator configured to receive a digital signal and split the received digital signal into an integer part and a fractional part; an estimator block configured to determine an estimated control signal; a digital-to-time converter configured to (i) receive the estimated control signal, (ii) receive a reference clock signal, and (iii) derive a delayed reference clock signal based on the reference clock signal and the estimated control signal; and a time-to-digital converter configured to (i) receive the delayed reference clock signal, (ii) receive a desired clock signal phase, and (iii) derive a fractional phase error based on the delayed reference clock signal and the desired clock signal phase, wherein the estimator block is further configured to receive the fractional phase error, and wherein determining the estimated control signal comprises:
determining a correlated signal by correlating the fractional phase error with a version of the fractional part having zero mean;multiplying the correlated signal with an absolute value of the correlated signal; andintegrating the outcome of the multiplication.