发明名称 Method for growing III-V epitaxial layers and semiconductor structure
摘要 Disclosed are methods of growing III-V epitaxial layers on a substrate, a semiconductor structure comprising a substrate, a device comprising such a semiconductor structure, and an electronic circuit. Group III-nitride devices, such as, for example, high-electron-mobility transistors, may include a two-dimensional electron gas (2DEG) between two active layers. For example, the 2DEG may be between a GaN layer and a AlGaN layer. These transistors may work in depletion-mode operation, which means the channel has to be depleted to turn the transistor off. For certain applications, such as, for example, power switching or integrated logic, negative polarity gate supply is undesired. Transistors may then work in enhancement mode (E-mode).
申请公布号 US9543424(B2) 申请公布日期 2017.01.10
申请号 US201214232942 申请日期 2012.07.06
申请人 EpiGaN NV 发明人 Derluyn Joff;Degroote Stefan;Germain Marianne
分类号 H01L29/778;H01L29/66;H01L29/20;H01L29/10 主分类号 H01L29/778
代理机构 McDonnell Boehnen Hulbert & Berghoff LLP 代理人 McDonnell Boehnen Hulbert & Berghoff LLP
主权项 1. A method of manufacturing a semiconductor III-V structure, comprising: providing a substrate; providing an active layer, by epitaxially growing a III-V semiconducting layer stack on top of the substrate, wherein epitaxially growing the III-V semiconducting layer stack comprises (i) growing a first active III-V layer and (ii) growing a second III-V active layer, thereby forming a two-dimensional electron gas between the first III-V active layer and the second III-V active layer; providing a protection layer stack for use as a mask for the first III-V active layer and the second III-V active layer, wherein the protection layer stack comprises (i) a III-V evaporation layer, (ii) a III-V etch stop layer on top of the evaporation layer, and (iii) a dielectric mask layer on top of the etch stop layer; locally etching the dielectric mask layer and the III-V etch stop layer in a gate region; and evaporating the III-V evaporation layer in the gate region to expose the second III-V active layer, wherein the dielectric mask layer remains in a region outside the gate region after evaporating the III-V evaporation layer in the gate region.
地址 Hasselt BE