发明名称 Memory arrangement
摘要 Among other things, techniques and systems are provided for activating a memory cell of a memory arrangement in preparation for at least one of a read operation or write operation. The memory arrangement comprises a word-line driver comprising at least a first input terminal and a second input terminal. The first input terminal is operably coupled to a first decoder and the second input terminal is operably coupled to a second decoder. When the word-line driver senses a first voltage at the first input terminal and a second voltage at the second input terminal, the word-line driver outputs a gate voltage signal which activates the memory cell.
申请公布号 US9536598(B2) 申请公布日期 2017.01.03
申请号 US201514886475 申请日期 2015.10.19
申请人 Taiwan Semiconductor Manufacturing Company Limi 发明人 Wu Wei-Cheng;Chen Yen-Huei;Liao Hung-Jen
分类号 G11C7/22;G11C11/419;G11C8/08;G11C5/02;G11C11/418;G11C8/10 主分类号 G11C7/22
代理机构 Cooper Legal Group, LLC 代理人 Cooper Legal Group, LLC
主权项 1. A memory arrangement, comprising: a memory cell configured to store content; and a word-line driver having a first input terminal coupled to a first decoder and a second input terminal coupled to a second decoder, wherein: the word-line driver controls activation and deactivation of the memory cell based upon a first signal applied to the word-line driver by the first decoder in combination with a second signal applied to the word-line driver by the second decoder, andthe word-line driver is configured to maintain the memory cell in a deactivated state when a logical state of the first signal is different than a logical state of the second signal.
地址 Hsin-Chu TW