发明名称 LOAD CURRENT COMPENSATION FOR ANALOG INPUT BUFFERS
摘要 In described examples of systems and methods for load current compensation for analog input buffers, an input buffer (300) may include: a first transistor (Q1) having a collector terminal coupled to a power supply node and a base terminal coupled to a first input node (vinp); a second transistor (Q2) having a collector terminal coupled to an emitter terminal of the first transistor (Q1); a third transistor (Q3) having an emitter terminal coupled to an emitter terminal of the second transistor (Q2) and to a ground node, a collector terminal coupled to a current source (Ibias), and a base terminal coupled to the collector terminal and to a base terminal of the second transistor (Q2); and a capacitor (C1) coupled to the base terminals of the second and third transistors (Q2 and Q3) and to a second input node (vinn), wherein the first and second input nodes (vinp and Vinn) are differential inputs.
申请公布号 WO2016090353(A3) 申请公布日期 2016.12.01
申请号 WO2015US64191 申请日期 2015.12.07
申请人 TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS JAPAN LIMITED 发明人 SAKURAI, Satoshi
分类号 H03M1/12;G11C27/02;H03K19/018 主分类号 H03M1/12
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