| 摘要 |
A voltage multiplier comprising a chain of multiplier stages, each multiplier stage (STGj) comprising first and second inputs (IPIj, IP2j) and first and second outputs (OPIj, 0P2j), which first and second outputs of a multiplier stage is coupled to respective first and second inputs of another multiplier stage, each multiplier stage (STGj) comprising a series diode arrangement of two diodes (DIj, D2j) coupled, in the same current conducting direction, between the first input (IPIj) and the first output (OPIj). Each multiplier stage (STGj) further comprises a first capacitor (CIj) coupled between the first input (IPIj) and the first output (OPIj), and a second capacitor (C2j) coupled between the second input (IP2j) and the second output (0P2j). Each multiplier stage (STGj) further comprises equalizing means (VLSj; C2j, C3j, C4j), preferably capacitors (Csj), for equalizing the current distributions, as a function of time, of the currents (Ij) through the diodes (DIj, D2j). |
