发明名称 シリアルデータの受信回路および受信方法、オーディオ信号処理回路、電子機器、オーディオシステム
摘要 PROBLEM TO BE SOLVED: To receive serial data stably.SOLUTION: A multiplication circuit 30 multiplies a bit clock BCK by N (N is a natural number) to generate a system clock PLLCK. A first buffer BUF1 and a second buffer BUF2 hold common data stored in a shift register 14 for different periods. A first counter 12 resets a count value to an initial value synchronously with loading of data into the first buffer BUF1. A second counter 56 resets a count value CNT2 thereof to an initial value repeatedly each time the count value reaches a set value. A strobe signal generation unit 58 asserts a first strobe signal STRB1 each time the count value CNT2 of the second counter 56 reaches a first prescribed value. A latch circuit 51 selectively latches data stored in either of the first buffer BUF1 and second buffer BUF2 synchronously with the first strobe signal STRB1.
申请公布号 JP5993665(B2) 申请公布日期 2016.09.14
申请号 JP20120192192 申请日期 2012.08.31
申请人 ローム株式会社 发明人 横山 靖友
分类号 H04L7/00;H04L7/033 主分类号 H04L7/00
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