Method of fabricating GaN high voltage HFET with passivation plus gate dielectric multilayer structure

摘要

A method of fabricating a multi-layer structure for a power transistor device includes performing, within a reaction chamber, a nitrogen plasma strike, resulting in the formation of a nitride layer directly on a nitride-based active semiconductor layer. A top surface of the nitride layer is then exposed to a second source. A subsequent nitrogen-oxygen plasma strike results in the formation of an oxy-nitride layer directly on the nitride layer. The nitride layer comprises a passivation layer and the oxy-nitride layer comprises a gate dielectric of the power transistor device.

主权项

1. A method of forming a passivation plus gate dielectric multilayer structure for a hetero-junction field-effect transistor (HFET) device comprising:
(a) exposing, in a reaction chamber, a top surface of a nitride-based semiconductor wafer to a first source that forms a film of material on the top surface; (b) performing, within the reaction chamber, a first plasma strike that reacts with the film to form a nitride-based passivation layer on the top surface; (c) exposing, in the reaction chamber, the nitride-based semiconductor wafer to a second source that results in a reaction of a material on a surface of the nitride-based passivation layer; (d) performing, within the reaction chamber, a second plasma strike that reacts with the material to form an oxy-nitride layer directly on the nitride-based passivation layer, the nitride-based passivation layer and the oxy-nitride layer comprising a gate dielectric of the HFET device.