发明名称 |
Distortion measurement for limiting jitter in PAM transmitters |
摘要 |
Methods and test equipment for measuring jitter in a Pulse Amplitude Modulated (PAM) transmitter. Under one procedure, a first two-level PAM signal test pattern is used to measure clock-related jitter separated into random and deterministic components, while a second two-level PAM signal test pattern is used to measure even-odd jitter (EOJ). Under another procedure, A four-level PAM signal test pattern is used to measure jitter-induced noise using distortion analysis. Test equipment are also disclosed for implementing various aspects of the test methods. |
申请公布号 |
US9344203(B2) |
申请公布日期 |
2016.05.17 |
申请号 |
US201514638507 |
申请日期 |
2015.03.04 |
申请人 |
Intel Corporation |
发明人 |
Ran Adee O. |
分类号 |
H04B3/46;H04B17/10;H04L1/20;H04L1/24;G01R31/317;H04L27/04;G01R29/027 |
主分类号 |
H04B3/46 |
代理机构 |
Law Office of R. Alan Burnett, PS |
代理人 |
Law Office of R. Alan Burnett, PS |
主权项 |
1. A method for measuring jitter in a four-level Pulse Amplitude Modulated (PAM4) transmitter, comprising:
employing a first two-level PAM4 signal test pattern to measure clock-related jitter separated into random and deterministic components; and employing a second two-level PAM4 signal test pattern to measure even-odd jitter (EOJ), wherein the first two-level PAM4 signal test pattern comprises a ‘03’ pattern that is periodical at 2 unit intervals (UI), wherein the 0 and 3 respectively correspond to a lowest and highest signal level of a PAM4 signal. |
地址 |
Santa Clara CA US |