| 摘要 |
The present invention relates to a substrate and an integrated circuit chip with improved patterns and, more particularly, to a technology configured to prevent the size of the chip from becoming larger, and improve durability of a pin to which a high voltage is applied. According to the present invention, a first clearance distance is larger than a second clearance distance. The first clearance distance is a distance between a first terminal to which a higher voltage is applied than a voltages applied to remaining terminals or a first terminal pattern corresponding to the first terminal and a body pattern between an integrated circuit and the substrate. The second clearance distance is a distance between the body pattern and a second terminal including at least a portion of the remaining terminals excepting for the first terminal or a second terminal pattern corresponding to the second terminal. |
