发明名称 IMPROVED ANALOGUE-TO-DIGITAL CONVERTOR
摘要 This application relates to analogue-to-digital converters (ADCs). An ADC 200 has a first converter (201 ) for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator (401 ) for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second convertor (202) receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator (403). A gain allocation block (204) generates the first and second conversion gain settings based on the time encoded signal (DT). The gain allocation block (204) may have a second PWM-to-digital modulator (203) which may be of lower latency and/or lower resolution that the first PWM-to-digital modulator (403).
申请公布号 WO2016071671(A1) 申请公布日期 2016.05.12
申请号 WO2015GB53239 申请日期 2015.10.29
申请人 CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LIMITED 发明人 LESSO, JOHN PAUL;HARDY, EMMANUEL
分类号 H03M1/18;H03M1/50 主分类号 H03M1/18
代理机构 代理人
主权项
地址