发明名称 STRUCTURE AND METHOD OF LATCHUP ROBUSTNESS WITH PLACEMENT OF THROUGH WAFER VIA WITHIN CMOS CIRCUITRY
摘要 A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
申请公布号 US2016126147(A1) 申请公布日期 2016.05.05
申请号 US201614993243 申请日期 2016.01.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Chapman Phillip F.;Collins David S.;Voldman Steven H.
分类号 H01L21/8238;H01L21/74;H01L27/092 主分类号 H01L21/8238
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor structure, comprising: forming an NFET device having a P-well at a top side of a substrate; forming a PFET device having an N-well at the top side of the substrate; and forming a substrate contact comprising a through wafer via extending from a backside of the substrate to a bottom surface of an isolation structure located between the NFET device and the PFET device, wherein the isolation structure comprises a shallow trench isolation (STI) structure and an isolation feature that abuts and extends below the STI structure.
地址 Armonk NY US